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The HiFi5-optimized SIMD kernel for the FP32XFP32 SUB operator is available in the xa_nnlib_hifi5 library. However, there is currently no integration or framework-level support to invoke this optimized (i.e., HiFi5 SIMD) implementation in TFLM.
Current Behavior:
Invokes ‘RefC’ implementation of FP32xFP32 SUB operator while running inference on Xtensa with optimizations enabled
Expected Behavior:
Should invoke available HiFi5 SIMD optimized FP32XFP32 SUB operator while running inference on Xtensa thereby improving performance
Proposed Fix:
Add the support in TFLM to invoke the available HiFi5 SIMD of FP32XFP32 SUB operator
The text was updated successfully, but these errors were encountered:
The HiFi5-optimized SIMD kernel for the FP32XFP32 SUB operator is available in the
xa_nnlib_hifi5
library. However, there is currently no integration or framework-level support to invoke this optimized (i.e., HiFi5 SIMD) implementation in TFLM.Current Behavior:
Invokes ‘RefC’ implementation of FP32xFP32 SUB operator while running inference on Xtensa with optimizations enabled
Expected Behavior:
Should invoke available HiFi5 SIMD optimized FP32XFP32 SUB operator while running inference on Xtensa thereby improving performance
Proposed Fix:
Add the support in TFLM to invoke the available HiFi5 SIMD of FP32XFP32 SUB operator
The text was updated successfully, but these errors were encountered: