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LibDisassembly: RISC-V disassembly 4-2/4-5: Disassemble extensions FD (floating-point), A (atomic) and Zicsr (CSRs) #25836

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This second PR in the collection deals with all the remaining non-priviledged extensions we need right now. I encourage anyone with three years of free time to tackle V :3

LibDisassembly: Add RISC-V Zicsr extension decoding

Note that CSR pretty-printing is not yet implemented, since we aim to establish shared CSR utilities in AK in the near future.

LibDisassembly: Add RISC-V FD extension decoding

Again, no point in splitting these two since the orthagonal instruction set makes supporting both in common abstractions convenient.

LibDisassembly: Add RISC-V A extension decoding

@github-actions github-actions bot added the 👀 pr-needs-review PR needs review from a maintainer or community member label Mar 25, 2025
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My ketchup, you already have the mustard
(Also not sure why I reviewed the commits in reverse)

@@ -147,6 +271,16 @@ String MemoryLoad::mnemonic() const
return MUST(String::formatted("l{}", m_width));
}

String FloatMemoryLoad::to_string(DisplayStyle display_style, u32, Optional<SymbolProvider const&>) const
{
return MUST(String::formatted("fl{:8} {}, {:#03x}({})", memory_width(), format_register(destination_register(), display_style), immediate(), format_register(base(), display_style)));
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You use mnemonic() in the format string everywhere except here and in FloatMemoryStore::to_string.

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You forgot to change it for FloatMemory**Store**.

Note that CSR pretty-printing is not yet implemented, since we aim to
establish shared CSR utilities in AK in the near future.
Again, no point in splitting these two since the orthagonal instruction
set makes supporting both in common abstractions convenient.
@kleinesfilmroellchen kleinesfilmroellchen force-pushed the risc-v-disasm/04-02-fdazicsr branch from 0de3973 to f35831d Compare April 10, 2025 19:53
Comment on lines +35 to +40
break;
default:
return adopt_own(*new (nothrow) UnknownInstruction);
}

return adopt_own(*new (nothrow) AtomicMemoryOperation(operation, is_acquire, is_release, width, raw_parts.rs1, raw_parts.rs2, raw_parts.rd));
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Suggested change
break;
default:
return adopt_own(*new (nothrow) UnknownInstruction);
}
return adopt_own(*new (nothrow) AtomicMemoryOperation(operation, is_acquire, is_release, width, raw_parts.rs1, raw_parts.rs2, raw_parts.rd));
return adopt_own(*new (nothrow) AtomicMemoryOperation(operation, is_acquire, is_release, width, raw_parts.rs1, raw_parts.rs2, raw_parts.rd));
default:
return adopt_own(*new (nothrow) UnknownInstruction);
}

nit: Having this break feels weird now that you cast the funct7 directly to the Operation enum.

@@ -172,6 +172,26 @@ String InstructionFetchFence::mnemonic() const
return "fence.i"_string;
}

String CSRImmediateInstruction::to_string(DisplayStyle display_style, u32, Optional<SymbolProvider const&>) const
{
return MUST(String::formatted("{:10} {}, {:x}, {}", mnemonic(), format_register(destination_register(), display_style), csr(), immediate()));
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:#x please


String CSRRegisterInstruction::to_string(DisplayStyle display_style, u32, Optional<SymbolProvider const&>) const
{
return MUST(String::formatted("{:10} {}, {:x}, {}", mnemonic(), format_register(destination_register(), display_style), csr(), format_register(source_register(), display_style)));
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Same here

@@ -147,6 +271,16 @@ String MemoryLoad::mnemonic() const
return MUST(String::formatted("l{}", m_width));
}

String FloatMemoryLoad::to_string(DisplayStyle display_style, u32, Optional<SymbolProvider const&>) const
{
return MUST(String::formatted("fl{:8} {}, {:#03x}({})", memory_width(), format_register(destination_register(), display_style), immediate(), format_register(base(), display_style)));
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You forgot to change it for FloatMemory**Store**.

Comment on lines 82 to 87
if ((raw_parts.funct7 & 1) > 0)
return adopt_own(*new ConvertFloat(ConvertFloat::Operation::SingleToDouble, rounding_mode, as_float_register(raw_parts.rs1), as_float_register(raw_parts.rd)));
else
return adopt_own(*new ConvertFloat(ConvertFloat::Operation::DoubleToSingle, rounding_mode, as_float_register(raw_parts.rs1), as_float_register(raw_parts.rd)));
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The fmt field (you call it width) is at the same position as for all other instructions.
It just means the target format for FCVT.S.D, FCVT.D.S etc.

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3 participants